FDC37C669-MT SMSC, FDC37C669-MT Datasheet - Page 95

• Manufacturer Part Number: FDC37C669-MT
• Description: IC CTRLR SUPER I/O FLPPY 100TQFP
• Manufacturer: SMSC

Specifications of FDC37C669-MT

• Controller Type: I/O Controller
• Interface: ISA Host
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 25mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1008

EXTENDED CAPABILITIES PARALLEL PORT
ECP provides a number of advantages, some of which
are listed below. The individual features are explained in
greater detail in the remainder of this section.
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Vocabulary
The following terms are used in this document:
assert
forward Host to Peripheral communication.
reverse Peripheral to Host communication.
Note 1: These registers are available in all modes.
Note 2: All FIFOs use one common 16 byte FIFO.
ISA IMPLEMENTATION STANDARD
This specification describes the standard ISA interface to
High performance half-duplex forward and reverse
channel
Interlocked handshake, for fast reliable transfer
Optional single byte RLE compression for improved
throughput (64:1)
Channel addressing for low-cost peripherals
Maintains link and data layer separation
Permits the use of active output drivers
Permits the use of adaptive signal timing
Peer-to-peer capability
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
When
"true" state, when a signal deasserts it
transitions to a "false" state.
a
Addr/RLE
compress
nBusy
PD7
signal
D7
0
0
asserts it transitions to a
intrValue
MODE
nAck
PD6
D6
0
0
Direction
PError
PD5
D5
0
0
Parallel Port Data FIFO
ECP Data FIFO
nErrIntrEn
ackIntEn
Select
PD4
Test FIFO
Address or RLE field
D4
1
0
95
PWord A port word; equal in size to the width of the
1
0
These terms may be considered synonymous:
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Reference Document:
IEEE 1284 Extended Capabilities Port Protocol and ISA
Interface Standard, Rev 1.09, Jan 7, 1993.
document is available from Microsoft.
The bit map of the Extended Parallel Port registers is:
the Extended Capabilities Port (ECP). All ISA devices
supporting ECP must meet the requirements contained in
this section or the port will not be supported by Microsoft.
SelectIn
dmaEn
nFault
PD3
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
D3
0
0
ISA interface. For this implementation, PWord
is always 8 bits.
A high level.
A low level.
serviceIntr
PD2
nInit
D2
0
0
0
autofd strobe
PD1
D1
full
0
0
0
empty
PD0
D0
0
0
0
Note
2
1
1
2
2
2
This