FDC37C669-MT SMSC, FDC37C669-MT Datasheet - Page 72

• Manufacturer Part Number: FDC37C669-MT
• Description: IC CTRLR SUPER I/O FLPPY 100TQFP
• Manufacturer: SMSC

Specifications of FDC37C669-MT

• Controller Type: I/O Controller
• Interface: ISA Host
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 25mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1008

The FDC37C669 incorporates two full function UARTs.
They are compatible with the NS16450, the 16450 ACE
registers and the NS16550A.
serial-to-parallel conversion on received characters and
parallel-to-serial conversion on transmit characters. The
data rates are independently programmable from 115.2K
baud down to 50 baud.
programmable for 1 start; 1, 1.5 or 2 stop bits; even, odd,
sticky or no parity; and prioritized interrupts. The UARTs
each contain a programmable baud rate generator that is
capable of dividing the input clock or crystal by a number
from 1 to 65535.
supporting the MIDI data rate. Refer to the FDC37C669
Configuration
The UARTs are also capable of
DLAB*
X
X
X
X
X
X
X
0
0
0
1
1
The character options are
Registers
Table 31 - Addressing the Serial Port
The UARTs
A2
0
0
0
0
0
0
1
1
1
1
0
0
*NOTE: DLAB is Bit 7 of the Line Control Register
SERIAL PORT (UART)
A1
0
0
0
1
1
1
0
0
1
1
0
0
perform
A0
0
0
1
0
0
1
0
1
0
1
0
1
for
72
Receive Buffer (read)
Transmit Buffer (write)
Interrupt Enable (read/write)
Interrupt Identification (read)
FIFO Control (write)
Line Control (read/write)
Modem Control (read/write)
Line Status (read/write)
Modem Status (read/write)
Scratchpad (read/write)
Divisor LSB (read/write)
Divisor MSB (read/write)
information on disabling, power down and changing the
base address of the UARTs. The interrupt from a UART
is enabled by programming OUT2 of that UART to a logic
"1".
interrupt.
REGISTER DESCRIPTION
Addressing of the accessible registers of the Serial Port is
shown below. The base addresses of the serial ports are
defined by the configuration registers (see Configuration
section).
sequentially increasing addresses above these base
addresses. The FDC37C669 contains two serial ports,
each of which contain a register set as described below.
OUT2 being a logic "0" disables that UART's
REGISTER NAME
The Serial Port registers are located at