FDC37C669-MT SMSC, FDC37C669-MT Datasheet - Page 33
FDC37C669-MT
Manufacturer Part Number
FDC37C669-MT
Description
IC CTRLR SUPER I/O FLPPY 100TQFP
Manufacturer
SMSC
Datasheet
1.FDC37C669-MT.pdf
(162 pages)
Specifications of FDC37C669-MT
Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
25mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1008
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FDC37C669-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
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CONFIGURATION CONTROL REGISTER (CCR)
Address 3F7 WRITE ONLY
PC/AT and PS/2 Modes
BIT 0 and 1 DATA RATE SELECT 0 and 1
These bits determine the data rate of the floppy controller.
PS/2 Model 30 Mode
BIT 0 and 1 DATA RATE SELECT 0 and 1
These bits determine the data rate of the floppy controller.
BIT 2 NO PRECOMPENSATION
This bit can be set by software, but it has no functionality.
register mode. Unaffected by software reset.
See Table 13 for the appropriate values.
See Table 13 for the appropriate values.
It can be read by bit 2 of the DSR when in Model 30
RESET
COND.
RESET
COND.
N/A
N/A
7
7
N/A
N/A
6
6
N/A
N/A
5
5
N/A
N/A
4
4
33
N/A
N/A
3
3
BIT 2 - 7 RESERVED
Should be set to a logical "0"
BIT 3 - 7 RESERVED
Should be set to a logical "0"
Table 13 shows the state of the DENSEL pin. The
DENSEL pin is set high after a hardware reset and is
unaffected by the DOR and the DSR resets.
NOPREC DRATE
N/A
N/A
2
2
DRATE
SEL1
SEL1
1
1
1
1
DRATE
DRATE
SEL0
SEL0
0
0
0
0
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