PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 126

• Manufacturer Part Number: PIC18F2455-I/SP
• Description: Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2455-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2450/4450
13.1
The Capture/Compare/PWM module is associated with
a control register (generically, CCP1CON) and a data
register (CCPR1). The data register, in turn, is
comprised of two 8-bit registers: CCPR1L (low byte)
and CCPR1H (high byte). All registers are both
readable and writable.
13.1.1
The CCP module utilizes Timer1 or Timer2, depending
on the mode selected. Timer1 is available to the mod-
ule in Capture or Compare modes, while Timer2 is
available for modules in PWM mode.
TABLE 13-1:
In Timer1 in Asynchronous Counter mode, the capture
operation will not work.
13.2
In Capture mode, the CCPR1H:CCPR1L register pair
captures the 16-bit value of the TMR1 register when an
event occurs on the corresponding CCP1 pin. An event
is defined as one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by the mode select bits,
CCP1M3:CCP1M0 (CCP1CON<3:0>). When a capture
is made, the interrupt request flag bit, CCP1IF, is set; it
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old
captured value is overwritten by the new captured value.
FIGURE 13-1:
DS39760A-page 124
CCP Mode
Compare
Capture
CCP Module Configuration
Capture Mode
PWM
CCP MODULE AND TIMER
RESOURCES
CCP1 pin
CCP MODE – TIMER
RESOURCE
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP1CON<3:0>
Prescaler
1, 4, 16
Timer Resource
Q1:Q4
Timer1
Timer1
Timer2
4
Edge Detect
4
Advance Information
and
Set CCP1IF
13.2.1
In Capture mode, the CCP1 pin should be configured
as an input by setting the corresponding TRIS direction
bit.
13.2.2
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCP1IE interrupt enable bit clear to avoid false
interrupts. The interrupt flag bit, CCP1IF, should also
be cleared following any such change in operating
mode.
13.2.3
There are four prescaler settings in Capture mode.
They are specified as part of the operating mode
selected by the mode select bits (CCP1M3:CCP1M0).
Whenever the CCP module is turned off or Capture
mode is disabled, the prescaler counter is cleared. This
means that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 13-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 13-1:
CLRF
MOVLW
MOVWF
Note:
CCP1CON
NEW_CAPT_PS
CCP1CON
CCP1 PIN CONFIGURATION
If RC2/CCP1 is configured as an output, a
write to the port can cause a capture
condition.
SOFTWARE INTERRUPT
CCP PRESCALER
TMR1
Enable
CCPR1H
TMR1H
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP1 SHOWN)
© 2006 Microchip Technology Inc.
; Turn CCP module off
; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
CCPR1L
TMR1L