PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 149

• Manufacturer Part Number: PIC18F2455-I/SP
• Description: Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2455-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

14.5.4
The USB Error Interrupt Enable register (Register 14-10)
contains the enable bits for each of the USB error
interrupt sources. Setting any of these bits will enable the
respective error interrupt source in the UEIR register to
propagate into the UERR bit at the top level of the
interrupt logic.
REGISTER 14-10: UEIE: USB ERROR INTERRUPT ENABLE REGISTER
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
BTSEE
R/W-0
USB ERROR INTERRUPT ENABLE
REGISTER (UEIE)
BTSEE: Bit Stuff Error Interrupt Enable bit
1 = Bit stuff error interrupt enabled
0 = Bit stuff error interrupt disabled
Unimplemented: Read as ‘0’
BTOEE: Bus Turnaround Time-out Error Interrupt Enable bit
1 = Bus turnaround time-out error interrupt enabled
0 = Bus turnaround time-out error interrupt disabled
DFN8EE: Data Field Size Error Interrupt Enable bit
1 = Data field size error interrupt enabled
0 = Data field size error interrupt disabled
CRC16EE: CRC16 Failure Interrupt Enable bit
1 = CRC16 failure interrupt enabled
0 = CRC16 failure interrupt disabled
CRC5EE: CRC5 Host Error Interrupt Enable bit
1 = CRC5 host error interrupt enabled
0 = CRC5 host error interrupt disabled
PIDEE: PID Check Failure Interrupt Enable bit
1 = PID check failure interrupt enabled
0 = PID check failure interrupt disabled
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
Advance Information
BTOEE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DFN8EE
R/W-0
As with the UIE register, the enable bits only affect the
propagation
microcontroller’s interrupt logic. The flag bits are still
set by their interrupt conditions, allowing them to be
polled and serviced without actually generating an
interrupt.
PIC18F2450/4450
CRC16EE
R/W-0
of
an
interrupt
x = Bit is unknown
CRC5EE
R/W-0
condition
DS39760A-page 147
PIDEE
R/W-0
to
bit 0
the