PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 132

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PIC18F2455-I/SP

Manufacturer Part Number
PIC18F2455-I/SP
Description
Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2455-I/SP

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2455-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2450/4450
14.2
The operation of the USB module is configured and
managed through three control registers. In addition, a
total of 22 registers are used to manage the actual USB
transactions. The registers are:
• USB Control register (UCON)
• USB Configuration register (UCFG)
• USB Transfer Status register (USTAT)
• USB Device Address register (UADDR)
• Frame Number registers (UFRMH:UFRML)
• Endpoint Enable registers 0 through 15 (UEPn)
14.2.1
The USB Control register (Register 14-1) contains bits
needed to control the module behavior during transfers.
The register contains bits that control the following:
• Main USB Peripheral Enable
• Ping-Pong Buffer Pointer Reset
• Control of the Suspend mode
• Packet Transfer Disable
REGISTER 14-1:
DS39760A-page 130
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
USB Status and Control
USB CONTROL REGISTER (UCON)
Unimplemented: Read as ‘0’
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers not being reset
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
PKTDIS: Packet Transfer Disable bit
1 = SIE token and packet processing disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing enabled
USBEN: USB Module Enable bit
1 = USB module and supporting circuitry enabled (device attached)
0 = USB module and supporting circuitry disabled (device detached)
RESUME: Resume Signaling Enable bit
1 = Resume signaling activated
0 = Resume signaling disabled
SUSPND: Suspend USB bit
1 = USB module and supporting circuitry in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry in normal operation, SIE clock clocked at the configured rate
Unimplemented: Read as ‘0’
PPBRST
R/W-0
UCON: USB CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
SE0
R-x
Advance Information
PKTDIS
R/C-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
USBEN
R/W-0
In addition, the USB Control register contains a status
bit, SE0 (UCON<5>), which is used to indicate the
occurrence of a single-ended zero on the bus. When
the USB module is enabled, this bit should be
monitored to determine whether the differential data
lines have come out of a single-ended zero condition.
This helps to differentiate the initial power-up state from
the USB Reset signal.
The overall operation of the USB module is controlled
by the USBEN bit (UCON<3>). Setting this bit activates
the module and resets all of the PPBI bits in the Buffer
Descriptor Table to ‘0’. This bit also activates the on-
chip voltage regulator, if enabled. Thus, this bit can be
used as a soft attach/detach to the USB. Although all
status and control bits are ignored when this bit is clear,
the module needs to be fully preconfigured prior to
setting this bit.
RESUME
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
SUSPND
R/W-0
U-0
bit 0

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