PIC24HJ32GP202-I/SO Microchip Technology Inc., PIC24HJ32GP202-I/SO Datasheet - Page 159

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PIC24HJ32GP202-I/SO

Manufacturer Part Number
PIC24HJ32GP202-I/SO
Description
16-BIT MCU, 28LD, 32KB FLASH, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24HJ32GP202-I/SO

A/d Inputs
10 Channel, 12-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
REGISTER 16-2:
© 2007 Microchip Technology Inc.
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
Value of bit only affects the transmit properties of the module when the IrDA encoder is enabled
(IREN = 1).
PIC24HJ32GP202/204 and PIC24HJ16GP304
RIDLE: Receiver Idle bit (read-only)
1 = Receiver is Idle
0 = Receiver is active
PERR: Parity Error Status bit (read-only)
1 = Parity error has been detected for the current character (character at the top of the receive FIFO)
0 = Parity error has not been detected
FERR: Framing Error Status bit (read-only)
1 = Framing error has been detected for the current character (character at the top of the receive
0 = Framing error has not been detected
OERR: Receive Buffer Overrun Error Status bit (read/clear only)
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed. Clearing a previously set OERR bit (1 → 0 transition) will reset
URXDA: Receive Buffer Data Available bit (read-only)
1 = Receive buffer has data, at least one more character can be read
0 = Receive buffer is empty
FIFO)
the receiver buffer and the UxRSR to the empty state.
U
x
STA: UART
x
STATUS AND CONTROL REGISTER (CONTINUED)
Preliminary
DS70289A-page 157

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