PIC24HJ32GP202-I/SO Microchip Technology Inc., PIC24HJ32GP202-I/SO Datasheet - Page 22

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PIC24HJ32GP202-I/SO

Manufacturer Part Number
PIC24HJ32GP202-I/SO
Description
16-BIT MCU, 28LD, 32KB FLASH, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24HJ32GP202-I/SO

A/d Inputs
10 Channel, 12-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC24HJ32GP202/204 and PIC24HJ16GP304
3.1.1
The program memory space is organized in word-
addressable blocks. Although it is treated as 24 bits
wide, it is more appropriate to think of each address of
the program memory as a lower and upper word, with
the upper byte of the upper word being unimplemented.
The lower word always has an even address, while the
upper word has an odd address (See Figure 3-2).
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement provides compatibility with data memory
space addressing and makes data in the program
memory space accessible.
FIGURE 3-2:
DS70289A-page 20
0x000001
0x000003
0x000005
0x000007
Address
msw
PROGRAM MEMORY
ORGANIZATION
Program Memory
PROGRAM MEMORY ORGANIZATION
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
most significant word
23
Preliminary
16
Instruction Width
3.1.2
All PIC24HJ32GP202/204 and PIC24HJ16GP304
devices reserve the addresses between 0x00000 and
0x000200 for hard-coded program execution vectors.
A hardware Reset vector is provided to redirect code
execution from the default value of the PC on device
Reset to the actual start of code. A GOTO instruction is
programmed by the user application at 0x000000, with
the actual address for the start of code at 0x000002.
PIC24HJ32GP202/204
devices also have two interrupt vector tables, located
from 0x000004 to 0x0000FF and 0x000100 to
0x0001FF. These vector tables allow each of the many
device interrupt sources to be handled by separate
Interrupt Service Routines (ISRs). Section 6.1 “Inter-
rupt Vector Table” provides a more detailed discus-
sion of the interrupt vector tables.
least significant word
8
INTERRUPT AND TRAP VECTORS
© 2007 Microchip Technology Inc.
and
0
(lsw Address)
PC Address
0x000000
0x000002
0x000004
0x000006
PIC24HJ16GP304

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