NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 144

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

The host must negotiate on the parallel port to determine if the peripheral supports the ECP protocol before ECP
operation. After negotiation, it is necessary to initialize some of the port bits.
ECP address/RLE bytes or data bytes may be sent automatically by writing the ecpAFifo or ecpDFifo, respectively.
11.3.12.1.
The software must handle P1284 negotiation and all operations prior to a data transfer in SPP or PS/2 modes
(000 or 001). The hardware provides an automatic control line handshake, moving data between the FIFO and
the ECP port, only in the data transfer phase (mode 011 or 010).
If the port is in mode 000 or 001, it may switch to any other mode. If the port is not in mode 000 or 001, it can only
be switched into mode 000 or 001. The direction can only be changed in mode 001.
In extended forward mode, the software should wait for the FIFO to be empty before switching back to mode 000
or 001. In ECP reverse mode, the software should wait for all the data to be read from the FIFO before changing
back to mode 000 or 001.
11.3.12.2.
ECP mode allows the transfer of normal 8-bit data or 8-bit commands. In the forward direction, normal data are
transferred when HostAck is high, and an 8-bit command is transferred when HostAck is low. The most significant
bits of the command indicate whether it is a run-length count (for compression) or a channel address.
In the reverse direction, normal data are transferred when PeriphAck is high, and an 8-bit command is transferred
when PeriphAck is low. The most significant bit of the command is always zero.
11.3.12.3.
The W83627UHG hardware supports RLE decompression and can transfer compressed data to a peripheral. Odd
(RLE) compression is not supported in the hardware, however. In order to transfer data in ECP mode, the
compression count is written to ecpAFifo and the data byte is written to ecpDFifo.
11.3.12.4.
The FIFO threshold is set in CR5. All data transferred to or from the parallel port can proceed in DMA or
Programmed I/O (non-DMA) mode, as indicated by the selected mode. The FIFO is used in Parallel Port FIFO
mode or ECP Parallel Port Mode. After a reset, the FIFO is disabled.
11.3.12 ECP Operation
(a) Set direction = 0, enabling the drivers.
(b) Set strobe = 0, causing the nStrobe signal to default to the deasserted state.
I Set autoFd = 0, causing the nAutoFd signal to default to the deasserted state.
(d) Set mode = 011 (ECP Mode)
Mode Switching
Command/Data
Data Compression
FIFO Operation
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W83627UHG/NCT6627UD
Publication Release Date: October 26, 2010
Revision 1.7