NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 37

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

7.2
The W83627UHG provides two interfaces, LPC and I
registers of the hardware monitor.
The internal registers of the hardware monitor block are accessible through two separate methods on the LPC
bus. The first set of registers, which primarily enables the block and sets its address in the CPU I/O address
space are accessed by the Super I/O protocol described in Chapter 6 at address 2Eh/2Fh or 4Eh/4Fh. The bulk of
the functionality and internal registers of this block are accessed from an index/data pair of CPU I/O addresses.
The standard locations are usually 295h/296h and are set by CR60 and CR61 accessed using the Super I/O
protocol as described in Chapter 6.
Due to the number of internal registers, it is necessary to separate the register sets into “banks” specified by
register 4Eh. The structure of the internal registers is shown in the following figure.
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7.2.1 LPC Interface
Access Interfaces
Analog Inputs
Fan Speed Measurement and Control
Smart Fan Control
SMI# Interrupt Mode
OVT# Interrupt Mode
Registers and Value RAM
2
C, for the microprocessor to read or write the internal
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W83627UHG/NCT6627UD
Publication Release Date: October 26, 2010
Revision 1.7