NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 152

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

13. POWER MANAGEMENT EVENT
The PME# (pin 86) signal is connected to the South Bridge and is used to wake up the system from S1 ~ S5
sleeping states.
One control bit and four registers in the W83627UHG are associated with the PME function. The control bit is at
Logical Device A, CR[F2h], bit[0] and is for enabling or disabling the PME function. If this bit is set to “0”, the
W83627UHG won’t output any PME signal when any of the wake-up events has occurred and is enabled. The
four registers are divided into PME status registers and PME interrupt registers of wake-up events
1) The PME status registers of wake-up event:
2) The PME interrupt registers of wake-up event:
Note.1
Note.2
This chapter describes how the W83627UHG implements its ACPI function via these power control pins: PSIN#
(Pin 68), PSOUT# (Pin 67), SUSB# (i.e. SLP_S3#; Pin 73) and PSON# (Pin 72). The following figure illustrates
the relationships.
13.1 Power Control Logic
PME wake-up events that the W83627UHG supports include:
All the above support both S0 and S1 states. Events with the “*” mark also support S3 and S5 states.
-
-
-
-
-
At Logical Device A, CR[F3h] and CR[F4h]
Each wake-up event has its own status
The PME status should be cleared by writing a “1” before enabling its corresponding bit in the PME
At Logical Device A, CR[F6h] and CR[F7h]
Each wake-up event can be enabled / disabled individually to generate a PME# signal
interrupt registers
Mouse IRQ event*
Keyboard IRQ event*
Printer IRQ event
Floppy IRQ event
UART A IRQ event
UART B IRQ event
UART C IRQ event
UART D IRQ event
UART E IRQ event
UART F IRQ event
Hardware Monitor IRQ event
WDTO# event
RIB (UARTB Ring Indicator) event
-143-
W83627UHG/NCT6627UD
Publication Release Date: October 26, 2010
Note.1
.
Revision 1.7