W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 112
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W83627UHG
Manufacturer Part Number
W83627UHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Specifications of W83627UHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.3.3
The Digital Output Register is a write-only register that controls drive motors, drive selection,
DRQ/IRQ enable, and FDC reset. All the bits in this register are cleared by the MR pin. The bit
definitions are as follows:
9.3.4
This register is used to assign a particular drive number to the tape drive support mode of the data
separator. This register also holds the media ID, drive type, and floppy boot drive information for the
floppy disk drive.
In normal floppy mode, this register only has bits 0 and 1, and the bit definitions are as follows:
If the three-mode FDD function is enabled (EN3MODE = 1 in LD0 CRF0, Bit 0), the bit definitions are
as follows:
DEFAULT
DEFAULT
NAME
NAME
BIT
BIT
7-5
1-0
7-2
4
3
2
1
0
BIT
BIT
Tape Drive Register (TD Register) (Read base address + 3)
Digital Output Register (DO Register) (Write base address + 2)
Reserved.
MOTOR ENABLE A. A logical 1 enables Motor A.
DMA & INT ENABLE. A logical 1 enables DRQ/IRQ.
FDC RESET. Floppy Disk Controller Reset. A logical 0 resets the FDC.
DRIVE SELECT.
Bits
1 0
0 0: Select Drive A.
0 1: Select Drive B.
1 0: Select Drive C.
1 1: Select Drive D.
RESERVED.
Tape sel 1.
Tape sel 0.
NA
7
0
7
RESERVED
NA
6
0
6
NA
5
0
5
RESERVED
ENABLE A
MOTOR
DESCRIPTION
DESCRIPTION
NA
-101-
4
0
4
DMA&INT
ENABLE
NA
3
0
3
Publication Release Date: May 25, 2007
RESET
FDC
NA
2
0
2
W83627UHG
Tape sel 1
1
0
1
0
DRIVE SELECT
Revision 1.0
Tape sel 0
0
0
0
0
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