W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 8

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.
14.
15.
16.
17.
18.
POWER MANAGEMENT EVENT........................................................................................... 138
13.1
13.2
13.3
13.4
SERIALIZED IRQ.................................................................................................................... 145
14.1
14.2
14.3
WATCHDOG TIMER............................................................................................................... 148
GENERAL PURPOSE I/O....................................................................................................... 149
16.1
16.2
CONFIGURATION REGISTER............................................................................................... 151
17.1
17.2
17.3
17.4
17.5
17.6
17.7
17.8
17.9
17.10
17.11
17.12
17.13
17.14
17.15
17.16
SPECIFICATIONS .................................................................................................................. 194
18.1
18.2
18.3
Power Control Logic ................................................................................................... 138
13.1.1
13.1.2
Wake Up the System by Keyboard and Mouse.......................................................... 141
13.2.1
13.2.2
Resume Reset Logic .................................................................................................. 142
PWROK Generation ................................................................................................... 143
Start Frame ................................................................................................................. 145
IRQ/Data Frame.......................................................................................................... 146
Stop Frame ................................................................................................................. 147
GPIO Architecture....................................................................................................... 149
Access Channels ........................................................................................................ 149
Chip (Global) Control Register.................................................................................... 151
Logical Device 0 (FDC)............................................................................................... 157
Logical Device 1 (Parallel Port) .................................................................................. 161
Logical Device 2 (UART A)......................................................................................... 162
Logical Device 3 (UART B)......................................................................................... 163
Logical Device 5 (Keyboard Controller)...................................................................... 165
Logical Device 6 (UART C)......................................................................................... 167
Logical Device 7 (GPIO3, GPIO4) .............................................................................. 168
Logical Device 8 (WDTO#, PLED, GPIO5, 6 & GPIO Base Address) ....................... 170
Absolute Maximum Ratings ........................................................................................ 194
DC CHARACTERISTICS............................................................................................ 194
AC CHARACTERISTICS............................................................................................ 199
18.3.1
18.3.2
18.3.3
18.3.4
Logical Device 9 (GPIO1, GPIO2 and SUSLED) ...................................................... 174
Logical Device A (ACPI)............................................................................................ 176
Logical Device B (Hardware Monitor) ....................................................................... 184
Logical Device C (PECI, SST)................................................................................... 185
Logical Device D (UART D)....................................................................................... 191
Logical Device E (UART E) ....................................................................................... 192
Logical Device F (UART F) ....................................................................................... 193
PSON# Logic..............................................................................................................139
AC Power Failure Resume .........................................................................................140
Waken up by Keyboard events...................................................................................141
Waken up by Mouse events .......................................................................................142
Power On / Off Timing ................................................................................................199
AC Power Failure Resume Timing .............................................................................200
Clock Input Timing......................................................................................................205
PECI and SST Timing ................................................................................................206
-VII-
Publication Release Date: May 25, 2007
W83627UHG
Revision 1.0