W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 119

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In PS/2 mode, the bit definitions are as follows:
In PS/2 Model 30 mode, the bit definitions are as follows:
DEFAULT
DEFAULT
BIT
BIT
6-3
NAME
6-4
NAME
7
2
1
0
7
3
2
1
0
BIT
BIT
DSKCHG. Indicates the complement of the DSKCHG# input.
Always 1 during a read.
DRATE 1.
DRATE 0.
HIGHDENS#.
0: 500 KB/S or 1 MB/S data rate (high-density FDD).
1: 250 KB/S or 300 KB/S data rate.
DSKCHG. Indicates the status of the DSKCHG# input.
Always 0 during a read.
DMAEN. Indicates the value of DO register, bit 3.
NOPREC. Indicates the value of the NOPREC bit in the CC REGISTER.
DRATE 1.
DRATE 0.
DSKCHG#
DSKCHG
7
0
7
1
6
1
6
0
5
1
5
0
-108-
DESCRIPTION
DESCRIPTION
4
1
4
0
Select the data rate of the FDC. See DR
register bits 1 and 0 (Data Rate Register
(DR Register) (Write base address + 4)) for
how the settings correspond to individual
data rates.
Select the data rate of the FDC. See DR
register bits 1 and 0 (Data Rate Register
(DR Register) (Write base address +4)) for
how the settings correspond to individual
data rates.
DMAEN
3
1
3
0
DRATE1
NOPREC
2
1
2
0
W83627UHG
DRATE0
DRATE1
1
0
1
1
DRATE0
DENS#
HIGH
0
1
0
0