LFXP6C-4TN144C Lattice, LFXP6C-4TN144C Datasheet - Page 275

• Manufacturer Part Number: LFXP6C-4TN144C
• Description: IC FPGA 5.8KLUTS 100I/O 144-TQFP
• Manufacturer: Lattice

Specifications of LFXP6C-4TN144C

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet: www.latticesemi.com
Revision History
September 2006
December 2004
October 2004
January 2005
October 2005
June 2004
June 2007
April 2007
[phone] (Outside North America)
[e-mail]
Date
Version
01.0
01.1
02.0
03.0
04.0
04.1
04.2
04.3
Initial release.
RST description with timing diagram added.
Primitive ‘Wake_On_Lock’ removed.
Added RST input in EPLLB.
Fin min 33 replaced with 25.
FB_MODE default = CLOCKTREE
CLKOP_DIV values for EHXPLLB 2, 4, 8,16, 32.
Appendices C and D integrated to body of the document.
DCS source code example moved to Appendix A.
LatticeXP information added.
Figures 6 and 7 updated.
CLKOP_FREQ, CLKOK_FREQ user attributes added.
FB_MODE added.
Clock Distribution section added.
Example code section removed and referred to help file.
GUI screen shots updated.
MM/IP Manager renamed as IPexpress.
Epllb definition section removed.
Clkos/clkok select attributes added.
Detailed clock distribution information added.
Updated footnote 3 in the LatticeECP/EC and LatticeXP PLL Attributes
table.
Updated Lock Output section of PLL Inputs and Outputs..
LatticeECP/EC and LatticeXP PLL I/O Definitions table - corrected sig-
nal name DDAIDEL to read DDAIDEL[2:0] in the Signals column.
11-19
sysCLOCK PLL Design and Usage Guide
Change Summary
LatticeECP/EC and LatticeXP