TXC-06101AILQ Transwitch Corporation, TXC-06101AILQ Datasheet - Page 146

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TXC-06101AILQ

Manufacturer Part Number
TXC-06101AILQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06101AILQ

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
PQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

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OW/APS Mode
The Rx E
output data (ORDO) consists of the E1 Byte, four Null Bytes, the K1 Byte, the K2 Byte, one Null Byte and the
E2 Byte. The order of output is MSB
respectively. The position of these two signals is determined by ALTOW (CR2; 0FA[H], Bit 3). When set to a "0"
value, SRFR occurs one clock period before the MSB of E1 and LRFR occurs one clock period before the MSB
of E2. A Setting of "1" results in SRFR and LRFR occurring coincident with the MSB of the E1 and E2 Bytes,
respectively. The signal RAP is an active Low pulse that occurs one clock time after the LSB of the K2 Byte.
Figure
OTCO. The input data (OTDI) is clocked in and TAP is clocked out on the Falling Edge. OTDI consists of the E1
Byte, one Null Byte, the K1 and K2 Bytes, three Null Bytes, the E2 Byte and a Null Byte. The order of input is
MSB
signals is determined by ALTOW. When ALTOW is "0", STFR occurs 1½ clock periods before the MSB of E1 is
sampled and LTFR occurs 1½ clock periods before the MSB of E2 is sampled. A Setting of "1" for ALTOW
results in STFR and LTFR occurring one half clock cycle before the MSB of the E1 and E2 Bytes, respectively,
is sampled. The signal TAP is an active Low pulse that occurs one clock time before the MSB of the K1 Byte is
sampled.
ORCO
ORDO
SRFR
LRFR
RAP
OTCO
OTDI
STFR
LTFR
TAP
70
LSB. STFR and LTFR are used to identify the E1 and E2 Bytes, respectively. The position of these two
X
depicts the operation of the Tx E
-K
X
msb
msb
/ TOH Port operation is shown in Figure 69. All outputs occur on the Rising Edge of ORCO. The
Proprietary TranSwitch Corporation Information for use Solely by its Customers
E1
E1
lsb
lsb
K1
Figure 69. Rx OW/APS Port
Figure 70. Tx OW/APS Port
LSB. SRFR and LRFR are used to identify the E1 and E2 Bytes,
X
-K
K2
X
/ TOH Port. STFR and LTFR are output on the Rising Edge of
- 146 of 196 -
1 FRAME (125 µS)
1 FRAME (125 µS)
DATA SHEET
K1
K2
ALTOW = "0"
ALTOW = "0"
ALTOW = "1"
E2
ALTOW = "1"
E2
TXC-06101
Ed. 3, April 2001
TXC-06101-MB
PHAST-1
E1

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