TC58NVG1S3ETA00 Toshiba, TC58NVG1S3ETA00 Datasheet - Page 31

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TC58NVG1S3ETA00

Manufacturer Part Number
TC58NVG1S3ETA00
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC58NVG1S3ETA00

Cell Type
NAND
Density
2Gb
Access Time (max)
30us
Interface Type
Serial
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
256M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Supplier Unconfirmed

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DEVICE OPERATION
Data Cache
Page Buffer
RY
Select page
RY
Select page
Read Mode
commands, a start address for the Read mode needs to be issued. Refer to the figures below for the sequence and
the block diagram (Refer to the detailed timing chart.).
Random Column Address Change in Read Cycle
CLE
ALE
CLE
ALE
/
RE
/
WE
WE
CE
BY
RE
I/O
CE
BY
I/O
Read mode is set when the "00h" and “30h” commands are issued to the Command register. Between the two
N
N
00h
00h
M
Start-address input
Col. M
Column Address M
M
I/O1 to 8: m = 2111
Page N
Start-address input
M’
30h
Page Address N
Busy
m
Start from Col. M
Cell array
t
R
M
Col. M
31
M+1
Page N
30h
Cache via Page Buffer starts on the rising edge of WE in the
30h command input cycle (after the address information has
been latched). The device will be in the Busy state during this
transfer period.
Serial data can be output synchronously with the RE clock
from the start address designated in the address input cycle.
address can be changed by inputting a new column address
using the 05h and E0h commands. The data is read out in serial
starting at the new column address. Random Column Address
Change operation can be done multiple times within the same
page.
M+2 M+3
A data transfer operation from the cell array to the Data
After the transfer period, the device returns to Ready state.
During the serial data output from the Data Cache, the column
05h
Busy
Col. M’
TC58NVG1S3ETA00
t
R
E0h
M
Page Address N
Start from Col. M’
M+1
M’ M’+1 M’+2 M’+3 M’+4
2010-05-21C
M+2
Page N

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