GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 72

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GD82559C S L3DF

Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet

Specifications of GD82559C S L3DF

Lead Free Status / Rohs Status
Not Compliant
82559 — Networking Silicon
8.1.21
8.1.22
64
Table 9.
Power Management Control/Status Register (PMCSR)
The Power Management Control/Status is a word register. It is used to determine and change the
current power state of the 82559 and control the power management interrupts in a standard
manner.
Power Management Control and Status Register
Data Register
The data register is an 8-bit read only register that provides a mechanism for the 82559 to report
state dependent maximum power consumption and heat dissipation. The value reported in this
register depends on the value written to the Data Select field in the PMCSR register. The power
measurements defined in this register have a dynamic range of 0 to 2.55 W with 0.01 W resolution
according to the Data Scale. The value in this register is hard coded in the silicon. The structure of
the data register differs between the 82559 B-step and C-step. The are presented below in
and
15
14:13
12:9
8
7:5
4
3:2
1:0
Bits
Table
Table 10. 82559 B-step Ethernet Data Register
0b
00b
0000b
0b
000b
0b
00b
00b
11, respectively.
Default
Data Select
Read/Clear
Read Only
Read Only
Read Clear
Read Only
Read Only
Read Only
Read/Write
Read/Write
0
1
2
Data Scale
PME Status. This bit is set upon a wake-up event. It is independent of
the state of the PME Enable bit. If 1b is written to this bit, the bit will be
cleared. It also de-asserts the PME# signal and clears the PME status
bit in the Power Management Driver Register. When the PME# signal
is enabled, the PME# signal reflects the state of the PME status bit.
In a CardBus system, writing a 1b to this bit clears the GWAKE bit in
the Function Event register. The Function Event register is described in
Section 9.1.14.1, “LAN Function Event
Data Scale. This field indicates the data register scaling factor. It
equals 10b for registers zero through eight and 00b for registers nine
through fifteen.
Data Select. This field is used to select which data is reported through
the Data register and Data Scale field.
PME Enable. This bit enables the 82559 to assert PME#.
Reserved. These bits are reserved and should be set to 000b.
Dynamic Data. The 82559 does not support the ability to monitor the
power consumption dynamically.
Reserved. These bits are reserved and should be set to 00b.
Power State. This 2-bit field is used to determine the current power
state of the 82559 and to set the 82559 into a new power state. The
definition of the field values is as follows.
2
2
2
00 - D0
01 - D1
10 - D2
11 - D3
D0 Power Consumption = 58 (580 mW)
D1 Power Consumption = 40 (400 mW)
D2 Power Consumption = 40 (400 mW)
Data Reported
Description
Register.”
Datasheet
Table 10

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