DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 190
![IC TXRX DS3/E3 100-CSBGA](/photos/6/94/69414/100-csbga_21-0153b_sml.jpg)
DS3170N+
Manufacturer Part Number
DS3170N+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3170.pdf
(230 pages)
Specifications of DS3170N+
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
- Current page: 190 of 230
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Bit 2: Alarm Indication Signal Interrupt Enable (AISIE) – This bit enables an interrupt if the AISL bit is set and
the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 1: Out Of Frame Interrupt Enable (OOFIE) – This bit enables an interrupt if the OOFL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 0: Loss Of Signal Interrupt Enable (LOSIE) – This bit enables an interrupt if the LOSL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 8: Framing Error Interrupt Enable (FEIE) – This bit enables an interrupt if the FEL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 0: Framing Error Count Interrupt Enable (FECIE) – This bit enables an interrupt if the FECL bit is set and the
bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Framing Error Count (FE[15:0]) – These sixteen bits indicate the number of framing error events on
the incoming E3 data stream. This register is updated via the PMU signal (see section 10.4.5)
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
FE15
FE7
15
15
--
--
0
7
0
0
7
0
FE14
FE6
14
14
--
--
0
6
0
0
6
0
E3G751.RSRIE2
E3 G.751 Receive Status Register Interrupt Enable #2
12Eh
E3G751.RFECR
E3 G.751 Receive Framing Error Count Register
134h
FE13
FE5
13
13
--
--
0
5
0
0
5
0
190 of 230
FE12
FE4
12
12
--
--
0
4
0
0
4
0
Reserved
Reserved
FE11
FE3
11
11
0
3
0
0
3
0
DS3170 DS3/E3 Single-Chip Transceiver
Reserved
Reserved
FE10
FE2
10
10
0
2
0
0
2
0
Reserved
Reserved
FE9
FE1
9
0
1
0
9
0
1
0
FECIE
FEIE
FE8
FE0
8
0
0
0
8
0
0
0
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