DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 87

• Manufacturer Part Number: DS3170N+
• Description: IC TXRX DS3/E3 100-CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3170N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 120mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

10.6.5.5.1 Receive C-bit DS3 Frame Format
The DS3 frame format is shown in
referred to as the far-end SEF/AIS bits). P
are the multiframe alignment bits that define the multiframe boundary. F
define the subframe boundary. Note: Both the M-bits and F-bits define the DS3 frame boundary. C
Application Identification Channel (AIC). C
Far-End Alarm and Control (FEAC) signal. C
are the C-bit parity bits used for path error monitoring. C
used for remote path error monitoring. C
C
10.6.5.5.2 Receive C-bit DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the C-bit DS3 frame. All of the DS3 overhead bits
X
P
bit). The C
overhead controller.
10.6.6 M23 DS3 Framer/Formatter
10.6.6.1 Transmit M23 DS3 Frame Processor
The M23 DS3 frame format is shown in
are the Remote Defect Indication (RDI) bits (also referred to as the far-end SEF/AIS bits). P
bits used for line error monitoring. M
alignment bits. C
tributary #X. The X-bit, P-bit, M-bit, C-bit, and F-bit positions are overhead bits, and the remainder of the bit
positions in the T3 frame are payload bits regardless of how they are marked by TDEN.
Table 10-28. M23 DS3 Frame Overhead Bit Definitions
X
P
M
F
C
C
10.6.6.2 Transmit M23 DS3 Frame Generation
M23 DS3 frame generation receives the incoming payload data stream, and overwrites all of the DS3 overhead bit
locations.
The multiframe alignment bits (M
respectively.
The subframe alignment bits (F
respectively.
The X-bits (X
programmable (automatic, 1, or 0). If the RDI is generated automatically, the X-bits are set to zero when one or
1
1
1
1
XY
62
11
X1
1
, X
, X
, P
, P
, M
, and C
, C
2
2
2
2
, P
2
, C
X2
, and M
BIT
, and C
1
31
, P
63
13
, C
2
are unused, and have a value of one. C
bit is sent over to the receive FEAC controller. The C
, M
32
3
1
X3
, and C
X
and X
, F
11
is the Application Identification Channel (AIC). C
XY
Remote Defect Indication
(RDI)
Parity Bits
Multiframe Alignment Bits
Subframe Alignment Bits
Application Identification
Channel (AIC)
Stuff Control Bits for Tributary
#X
, and C
33
2
) are both overwritten with the Remote Defect Indicator (RDI). The RDI source is
bits are output as an error indication (modulo 2 addition of the calculated parity and the
XY
DEFINITION
X1
are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
, F
1
X2
, M
Figure
, F
1
Figure
2
X3
, M
, and M
51
, and F
1
12
, C
and P
2
21
10-13. X
, and M
is reserved for future network use, and has a value of one. C
, C
52
10-13.
, and C
X4
22
2
3
) are overwritten with the values zero, one, and zero (010)
, and C
) are overwritten with the values one, zero, zero, and one (1001)
are the parity bits used for line error monitoring. M
87 of 230
71
3
1
, C
Table 10-28
and X
are the multiframe alignment bits. F
53
72
41
23
are the path maintenance data link (or HDLC) bits. C
, and C
, C
are unused, and have a value of one. C
2
42
are the Remote Defect Indication (RDI) bits (also
, and C
73
51
defines the framing bits for M23 DS3. X
, C
are unused, and have a value of one.
X1
52
, C
43
, and C
DS3170 DS3/E3 Single-Chip Transceiver
are the Far-End Block Error (FEBE) bits
XY
X2
, and C
are the subframe alignment bits that
53
bits are sent to the receive HDLC
X3
are the stuff control bits for
1
XY
and P
are the subframe
31
2
, C
are the parity
1
, M
32
2
, and C
11
, and M
1
13
and X
is the
is the
61
33
2
3
,