DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 53
![IC TXRX DS3/E3 100-CSBGA](/photos/6/94/69414/100-csbga_21-0153b_sml.jpg)
DS3170N+
Manufacturer Part Number
DS3170N+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3170.pdf
(230 pages)
Specifications of DS3170N+
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
- Current page: 53 of 230
- Download datasheet (3Mb)
DS3170 DS3/E3 Single-Chip Transceiver
10 FUNCTIONAL DESCRIPTION
10.1 Processor Bus Interface
10.1.1 SPI Serial Port Mode
The external processor bus can be configured to operate in SPI serial bus mode. See the section
8.3.4.1
for
detailed timing diagrams.
When SPI = 1, SPI bus mode is implemented using four signals: clock (CLK), master-out slave-in data (MOSI),
master-in slave-out data (MISO), and chip select (CS). Clock polarity and phase can be set by the D[7]/SPI_CPOL
and D[6]/SPI_CPHA pins.
The order of the address and data bits in the serial stream is selectable using the D[5]/SPI_SWAP pin. The R/W bit
is always first and B bit is always last in the initial control word and are not effected by the D[5]/SPI_SWAP pin
setting.
10.1.2 8/16 Bit Bus Widths
The external processor bus can be sized for 8 or 16 bits using the WIDTH pin. When in 8-bit mode (WIDTH=0), the
address is composed of all the address bits including A[0], the lower 8 data lines D[7:0] are used and the upper 8
data lines D[15:8] are not used and never driven during a read cycle. When in 16-bit mode (WIDTH=1), the
address bus does not include A[0] (the LSB of the address bus is not routed to the chip) and all 16 data lines
D[15:0] are used. See
Figure 8-27
and
Figure 8-29
for functional timing diagrams.
10.1.3 Ready Signal (RDY)
The RDY signal allows the microprocessor to use the minimum bus cycle period for maximum efficiency. When
this signal goes low, the RD or WR cycle can be terminated. See
Figure 8-35
for functional timing diagrams.
Note: The RDY signal will not go active if the user attempts to read or write unused registers not assigned to any
design blocks. The RDY signal will go active if the user writes or reads reserved registers or unused registers within
design blocks.
10.1.4 Byte Swap Modes
The processor interface can operate in byte swap mode when the data bus is configured for 16-bit operation. The
A[0]/BSWAP pin is used to determine whether byte swapping is enabled. This pin should be static and not change
while operating. When the A[0]/BSWAP pin is low the upper register bits REG[15:8] are mapped to the upper
external data bus lines D[15:8], and the lower register bits REG[7:0] are mapped to the lower external data bus
lines D[7:0]. When the A[0]/BSWAP pin is high the upper register bits REG[15:8] are mapped to the lower external
data bus lines D[7:0], and the lower register bits REG[7:0] are mapped to the upper external data bus lines D[15:8].
See
Figure 8-31
and
Figure 8-32
for functional timing diagrams.
10.1.5 Read-Write/Data Strobe Modes
The processor interface can operate in either read-write strobe mode or data strobe mode. When MODE=0 the
read-write strobe mode is enabled and a negative pulse on RD performs a read cycle, and a negative pulse on WR
performs a write cycle. When MODE=1 the data strobe mode is enabled and a negative pulse on DS when R/W is
high performs a read cycle, and a negative pulse on DS when R/W is low performs a write cycle. The read-write
strobe mode is commonly called the “Intel” mode, and the data strobe mode is commonly called the “Motorola”
mode.
10.1.6 Clear on Read/Clear on Write Modes
The latched status register bits can be programmed to clear on a read access or clear on a write access. The
global control register bit GL.CR1.LSBCRE controls the mode that all of the latched registers are cleared. When
LSBCRE=0, the latched register bits will be cleared when the register is written to and the write data has the
register bits to clear set. When LSBCRE=1, the latched register bits that are set will be cleared when the register is
read.
53 of 230
Related parts for DS3170N+
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DS3170+](/photos/6/94/69414/100-csbga_21-0153b_tmb.jpg)
Part Number:
Description:
IC TXRX DS3/E3 100-CSBGA
Manufacturer:
Maxim Integrated Products
Datasheet:
![DS3170](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
Manufacturer:
Maxim Integrated Products
Datasheet:
![MAX7528KCWP](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
MAX7528KCWPMaxim Integrated Products [CMOS Dual 8-Bit Buffered Multiplying DACs]
Manufacturer:
Maxim Integrated Products
Datasheet:
![MAX3261CCJ](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Single +5V, fully integrated, 1.25Gbps laser diode driver.
Manufacturer:
Maxim Integrated Products
Datasheet:
![MAX3263CAG](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Single +5V, fully integrated, 155Mbps laser diode driver.
Manufacturer:
Maxim Integrated Products
Datasheet:
![MAX8809AETL+](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
VRD11/VRD10, K8 Rev F 2/3/4-Phase PWM Controllers with Integrated Dual MOSFET Drivers
Manufacturer:
Maxim Integrated Products
Datasheet:
![MAX1535CETJ+T](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Highly Integrated Level 2 SMBus Battery Chargers
Manufacturer:
Maxim Integrated Products
Datasheet:
![DS2741N+](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Current Monitor and Accumulator with Integrated Sense Resistor; ; Temperature Range: -40°C to +85°C
Manufacturer:
Maxim Integrated Products
![MAX13450EAUD+T](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
TSSOP 14/A/RS-485 Transceivers with Integrated 100O/120O Termination Resis
Manufacturer:
Maxim Integrated Products
![MAX13451EAUD+T](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
TSSOP 14/A/RS-485 Transceivers with Integrated 100O/120O Termination Resis
Manufacturer:
Maxim Integrated Products
![MAX17497BATE+](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
QFN 16/A/AC-DC and DC-DC Peak-Current-Mode Converters with Integrated Step
Manufacturer:
Maxim Integrated Products
![MAX17502FATB+T](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
TDFN/A/65V, 1A, 600KHZ, SYNCHRONOUS STEP-DOWN REGULATOR WITH INTEGRATED SWI
Manufacturer:
Maxim Integrated Products
![MAX1978EVKIT](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
Integrated Temperature Controller f
Manufacturer:
Maxim Integrated Products
![MAX2606EUT+](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
SOT23-6/I/45MHz to 650MHz, Integrated IF VCOs with Differential Output
Manufacturer:
Maxim Integrated Products
![MAX2608EUT+](/images/manufacturer_photos/0/4/417/maxim_integrated_products_tmb.jpg)
Part Number:
Description:
SOT23-6/I/45MHz to 650MHz, Integrated IF VCOs with Differential Output
Manufacturer:
Maxim Integrated Products