DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 42
![IC TXRX DS3/E3 100-CSBGA](/photos/6/94/69414/100-csbga_21-0153b_sml.jpg)
DS3170N+
Manufacturer Part Number
DS3170N+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3170.pdf
(230 pages)
Specifications of DS3170N+
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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Figure 8-13. DS3 Framed Mode Transmit Serial Interface Pin Timing
Figure 8-14. E3 G.751 Framed Mode Transmit Serial Interface Pin Timing
Figure 8-15. E3 G.832 Framed Mode Transmit Serial Interface Pin Timing
8.3.3.2
The RSER signal has the DS3 or E3 payload as well as the DS3 or E3 overhead bits. The RDEN signal is used to
enable external logic for payload processing and will be high during the DS3 or E3 payload bits and low during the
DS3 or E3 overhead bits. The RGCLK signal can also be used to clock only the DS3 or E3 payload bits into
external logic since the clock is stopped during the DS3 or E3 overhead bits. The RSOFO signal marks the first
overhead bit of the DS3 or E3 frame.
Figure 8-16
DS3 TGCLK
E3 TGCLK
E3 TGCLK
TCLKO or
TCLKO or
TCLKO or
DS3 TSER
DS3 TDEN
E3 TSER
E3 TDEN
E3 TSER
E3 TDEN
TSOFO
TSOFO
TSOFO
TCLKI
TCLKI
TCLKI
TSOFI
TSOFI
TSOFI
DS3/E3 Framed Mode Receive Serial Interface Pin Functional Timing
to
Figure 8-18
1
1
1
2
2
2
3
3
3
show the relationship between the receive serial interface pins.
4
4
4
TSER DATA IS OVERWRITTEN WITH OH
5
5
5
TSER DATA IS OVERWRITTEN WITH OH
6
6
6
TSER DATA IS OVERWRITTEN WITH OH
7
7
7
8
8
8
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9
9
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DS3170 DS3/E3 Single-Chip Transceiver
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