ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 113

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.2.1
8151H–AVR–02/11
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Capture Reg-
ister (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (shorten as Int.Req.) signals are all visible in the
Timer Interrupt Flag Register (TIFR) and Extended Timer Interrupt Flag Register (ETIFR). All
interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK) and Extended
Timer Interrupt Mask Register (ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure
since these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the clock select logic is referred to as the timer clock (clk
115. The Timer/Counter Control Registers (TCCRnA/B/C) are 8-bit registers and have no
Refer to
Timer/Counter1 and 3 pin placement and description.
Figure 1-1 on page
Timer/Counter
TCCRxA
OCRxA
OCRxB
OCRxC
TCNTx
ICRx
=
=
=
2,
Direction
Count
Clear
Table 12-5 on page
Control Logic
TOP
=
TCCRxB
Values
BOTTOM
Fixed
TOP
ICFx (Int.Req.)
TCLK
Detector
Edge
=
0
74, and
Table 12-14 on page 81
“Accessing 16-bit Registers” on
OCFxA
(Int.Req.)
OCFxB
(Int.Req.)
OCFxC
(Int.Req.)
TOVx
(Int.Req.)
Clock Select
Generation
Generation
Generation
( From Prescaler )
Waveform
Waveform
Waveform
Canceler
TCCRxC
Detector
Noise
Edge
ATmega128A
Comparator Ouput )
( From Analog
OCxA
OCxB
OCxC
ICPx
Tx
for
T
n
).
113