ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 325

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.7
8151H–AVR–02/11
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega128A Two-wire Serial Interface operation. Other devices connected to the Two-wire
Parallel Programming Characteristics
Serial Bus need only obey the general f
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
Figure 27-3. Two-wire Serial Bus Timing
Figure 27-4. Parallel Programming Timing, Including some General Timing Requirements
Figure 27-5. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
SCL
(DATA, XA0/1, BS1, BS2)
> 100kHz.
SCL
SDA
PAGEL
XTAL1
DATA
BS1
XA0
XA1
The timing requirements shown in
ing operation.
t
SU;STA
Data & Contol
RDY/BSY
PAGEL
XTAL1
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
SCL
WR
requirement.
t
HD;STA
t
of
t
LOW
t
t
BVPH
DVXH
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
t
HIGH
t
Figure 27-4
t
XHXL
PHPL
t
HD;DAT
t
t
t
t
t
XLXH
XLDX
PLBX
XLWL
PLWL
t
LOW
(that is t
t
(HIGH BYTE)
BVWL
LOAD DATA
t
SU;DAT
DVXH
DATA (High Byte)
t
t
WL WH
XLPH
, t
WLRL
LOAD DATA
XHXL
, and t
t
ATmega128A
PLXH
t
WLBX
XLDX
t
SU;STO
LOAD ADDRESS
t
) also apply to load-
r
(LOW BYTE)
ADDR1 (Low Byte)
t
WLRH
t
BUF
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