ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 76

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.3.3
8151H–AVR–02/11
Alternate Functions of Port C
Table 12-6.
Note:
Table 12-7.
In ATmega103 compatibility mode, Port C is output only. The ATmega128A is by default
shipped in compatibility mode. Thus, if the parts are not programmed before they are put on the
PCB, PORTC will be output during first power up, and until the ATmega103 compatibility mode
is disabled. The Port C has an alternate function as the address high byte for the External Mem-
ory Interface.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. See
ATmega103 compatibility mode.
PB3/MISO
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR
SPI SLAVE OUTPUT
0
0
SPI MSTR INPUT
–
Overriding Signals for Alternate Functions in PB7:PB4
Overriding Signals for Alternate Functions in PB3:PB0
“Output Compare Modulator (OCM1C2)” on page 163
PB7/OC2/OC1C
0
0
0
0
OC2/OC1C ENABLE
OC2/OC1C
0
0
–
–
(1)
PB2/MOSI
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MSTR OUTPUT
0
0
SPI SLAVE INPUT
–
(1)
PB6/OC1B
0
0
0
OC1B ENABLE
OC1B
0
0
–
–
0
PB1/SCK
SPE • MSTR
PORTB1 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
0
0
SCK INPUT
–
PB5/OC1A
0
0
0
0
OC1A ENABLE
OC1A
0
0
–
–
for details. OC1C does not exist in
ATmega128A
PB0/SS
SPE • MSTR
PORTB0 • PUD
SPE • MSTR
0
0
0
0
0
SPI SS
–
PB4/OC0
0
0
0
0
OC0 ENABLE
OC0B
0
0
–
–
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