ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 118

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.3
20.3.1
20.3.2
118
Register Description
ATmega406
VADMUX – V-ADC Multiplexer Selection Register
VADCSR – V-ADC Control and Status Register
ADC Conversion Complete Interrupt Flag – VADCCIF is set. One 12-bit conversion takes 519 µs
to complete from the start bit is set to the interrupt flag is set. To ensure that correct data is read,
both high and low byte data registers should be read before starting a new conversion.
• Bit 7:4 – RES: Reserved Bits
These bits are reserved bits in the ATmega406 and will always read as zero.
• Bit 3:0 – VADMUX3:0: V-ADC Channel Selection Bits
The VADMUX bits determine the V-ADC channel selection. See
Table 20-1.
• Bit 7:4 – RES: Reserved Bits
These bits are reserved bits in the ATmega406 and will always read as zero.
• Bit 3 – VADEN: V-ADC Enable
Writing this bit to one enables V-ADC conversion. By writing it to zero, the V-ADC is turned off.
Turning the V-ADC off while a conversion is in progress will terminate this conversion. Note that
the bandgap voltage reference must be enabled separately, see “BGCCR – Bandgap Calibra-
tion C Register” on page 123.
Bit
(0x7C)
Read/Write
Initial Value
Bit
(0x7A)
Read/Write
Initial Value
VADMUX3:0
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
VADMUX channel selection
R
7
–
0
R
7
0
–
R
6
–
0
R
6
0
–
R
5
–
0
R
5
0
–
Channel Selected
CELL 1
CELL 2
CELL 3
CELL 4
ADC4
VTEMP
ADC0
ADC1
ADC2
ADC3
R
R
4
–
0
4
–
0
VADMUX3
VADEN
R/W
R/W
3
0
3
0
VADMUX2
VADSC
R/W
R/W
2
0
2
0
Table 20-1 on page
Scale
0.2
0.2
0.2
0.2
0.2
1.0
1.0
1.0
1.0
1.0
VADMUX1
VADCCIF
R/W
R/W
1
0
1
0
VADMUX0
VADCCIE
R/W
R/W
0
0
0
0
2548E–AVR–07/06
118.
VADMUX
VADCSR