ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 133

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23. FET Control
2548E–AVR–07/06
In addition to the FET disable control signals from the battery protection circuitry, the CPU may
disable the Charge FET (C-FET), the Discharge FET (D-FET), or both, by writing to the FET
Control Register. Note that the CPU is never allowed to enable a FET that is disabled by the bat-
tery protection circuitry. The FET control is shown in
The PWM output from the 8-bit Timer/Counter0, OC0B, can be configured to drive the C-FET,
Precharge FET (PC-FET) or both directly. This can be useful for controlling the charging of the
battery cells. The PWM is configured by the COM0B1:0 and WGM02:0 bits in the
TCCR0A/TCCR0B registers. Note that the OC0B pins does not need to be configured as an out-
put. This means that the PWM output can be used to drive the C-FET and/or the PC-FET
without occupying the OC0B-pin.
If C-FET is disabled and D-FET enabled, discharge current will run through the body-drain diode
of the C-FET and vice versa. To avoid the potential heat problem from this situation, software
must ensure that D-FET is not disabled when a charge current is flowing, and that C-FET is not
disabled when a discharge current is flowing.
If the battery has been deeply discharged, large surge currents may result when a charger is
connected. In this case, it is recommended to first pre charge the battery through a current limit-
ing resistor. For this purpose, ATmega406 provides a Precharge FET (PC-FET) control output.
This output is default enabled.
If ATmega406 has entered the Power-off mode, all FET control outputs will be disabled. When a
charger is connected, the CPU will wake up. When waking up from Power-off mode, the C-FET
and D-FET control outputs will remain disabled while PC-FET is default enabled. When the CPU
detects that the cell voltages have risen enough to allow normal charging, it should enable the
C-FET and D-FET control outputs and disable the PC-FET control output.
If the Current Battery Protection has been activated, the Current Protection Timer will ensure a
hold-off time of 1 second before software can re-enable the external FETs.
Figure 23-1. FET Control Block Diagram
Power-off Mode
CURRENT_PROTECTION
OC0B
Register
Control
Status
FET
and
Current Protection
PWMOC
CFE
PWMOPC
PFD
DFE
Timer
Figure 23-1 on page
1
0
1
0
ATmega406
133.
Driver
Driver
Driver
FET
FET
FET
OC
OPC
OD
133