ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 119

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.3.3
2548E–AVR–07/06
VADCL and VADCH – The V-ADC Data Register
• Bit 2 – VADSC: Voltage ADC Start Conversion
Write this bit to one to start a new conversion of the selected channel.
VADSC will read as one as long as the conversion is not finished. When the conversion is com-
plete, it returns to zero. Writing zero to this bit has no effect. VADSC will automatically be
cleared when the VADEN bit is written to zero.
• Bit 1 – VADCCIF: V-ADC Conversion Complete Interrupt Flag
This bit is set when a V-ADC conversion completes and the data registers are updated. The V-
ADC Conversion Complete Interrupt is executed if the VADCCIE bit and the I-bit in SREG are
set. VADCCIF is cleared by hardware when executing the corresponding interrupt handling vec-
tor. Alternatively, VADCCIF is cleared by writing a logical one to the flag. Beware that if doing a
Read-Modify-Write on VADCSR, a pending interrupt can be disabled.
• Bit 0 – VADCCIE: V-ADC Conversion Complete Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the V-ADC Conversion Complete
Interrupt is activated.
When a V-ADC conversion is complete, the result is found in these two registers. To ensure that
correct data is read, the data registers must be read before starting a new conversion.
• VADC11:0: V-ADC Conversion Result
These bits represent the result from the conversion.
To obtain the best absolute accuracy for the cell voltage measurements, gain and offset com-
pensation is required. Factory calibration values are stored in the device signature row, refer to
section
mV is given by:
When performing a Vtemp conversion, the result must be adjusted by the factory calibration
value stored in the signature row, refer to section
page 189
Bit
(0x79)
(0x78)
Read/Write
Initial Value
”Reading the Signature Row from Software” on page 189
Cell
for details. The absolute temperature in Kelvin is given by:
n
voltage mV
15
R
R
–
7
0
0
(
)
=
14
R
R
–
6
0
0
cell
---------------------------------------------------------------------------------------------------
T(K)
n
result cell
=
V
----------------------------------------------------------------------------------------------- -
13
R
R
–
5
0
0
temp
⋅
result VPTAT calibration word
n
TBD
gain calibration word
12
R
R
0
–
4
0
⋅
VADC[7:0]
TBD
”Reading the Signature Row from Software” on
11
R
R
3
0
0
–
10
R
R
2
0
0
cell
VADC[11:8]
n
for details. The cell voltage in
offset calibration word
R
R
9
1
0
0
ATmega406
R
R
8
0
0
0
VADCH
VADCL
119