ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 216

• Manufacturer Part Number: ATmega8
• Manufacturer: Atmel Corporation

Specifications of ATmega8

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Fuse Bits
216
ATmega8(L)
Table 86. Lock Bit Protection Modes
Notes:
The ATmega8 has two fuse bytes.
tionality of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are
read as logical zero, “0”, if they are programmed.
Table 87. Fuse High Byte
Notes:
RSTDISBL
WDTON
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
BLB1 Mode
Fuse High
Byte
1
2
3
4
Memory Lock Bits
(1)
1. Program the Fuse Bits before programming the Lock Bits
2. “1” means unprogrammed, “0” means programmed
1. The SPIEN Fuse is not accessible in Serial Programming mode
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits, see
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See
4. When programming the RSTDISBL Fuse Parallel Programming has to be used to change
(2)
(4)
on page 26
fuses or perform further programming
BLB12
No.
Bit
1
1
0
0
7
6
5
4
3
2
1
0
for details
Description
Select if PC6 is I/O pin or RESET pin
WDT always on
Enable Serial Program and Data
Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
page 213
Select Boot Size (see
page 213
Select Reset Vector
BLB11
1
0
0
1
for details)
for details)
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section
SPM is not allowed to write to the Boot Loader section
SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If Interrupt
Vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section
LPM executing from the Application section is not allowed
to read from the Boot Loader section. If Interrupt Vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section
Table 87
(2)
(Continued)
and
Table 82 on
Table 82 on
Table 88 on page 217
Default Value
1 (unprogrammed, PC6 is
RESET-pin)
1 (unprogrammed, WDT
enabled by WDTCR)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
describe briefly the func-
Table 82 on page 213
(3)
(3)
“Clock Sources”
2486Z–AVR–02/11