ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 25

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ATmega8

Manufacturer Part Number
ATmega8
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8

Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
2
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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System Clock
and Clock
Options
Clock Systems
and their
Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
2486Z–AVR–02/11
I/O
CPU
FLASH
Figure 10
the clocks need not be active at a given time. In order to reduce power consumption, the clocks
to modules not being used can be halted by using different sleep modes, as described in
Management and Sleep Modes” on page
Figure 10. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
Data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART.
The I/O clock is also used by the External Interrupt module, but note that some external inter-
rupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted. Also note that address recognition in the TWI module is carried out asynchro-
nously when clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
Timer/Counter
Timer/Counter
Asynchronous
Oscillator
presents the principal clock systems in the Atmel
I/O
is halted, enabling TWI address reception in all sleep modes.
General I/O
External RC
Modules
Oscillator
clk
clk
ASY
I/O
External Clock
Control Unit
AVR Clock
Multiplexer
Clock
ADC
33. The clock systems are detailed
clk
Source Clock
ADC
CPU Core
Reset Logic
clk
Oscillator
clk
Crystal
CPU
FLASH
®
Watchdog Clock
AVR
Crystal Oscillator
Low-Frequency
®
Watchdog Timer
and their distribution. All of
Watchdog
Oscillator
RAM
ATmega8(L)
Figure
Calibrated RC
Flash and
EEPROM
Oscillator
10.
“Power
25

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