ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 96

• Manufacturer Part Number: ATmega8
• Manufacturer: Atmel Corporation

Specifications of ATmega8

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

16-bit
Timer/Counter
Register
Description
Timer/Counter 1
Control Register A –
TCCR1A
96
ATmega8(L)
• Bit 7:6 – COM1A1:0: Compare Output Mode for channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for channel B
The COM1A1:0 and COM1B1:0 control the Output Compare Pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 36. Compare Output Mode, Non-PWM
Table 37
mode.
Table 37. Compare Output Mode, Fast PWM
Note:
Bit
Read/Write
Initial Value
COM1A1/
COM1A1/
COM1B1
COM1B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast PWM
this case the Compare Match is ignored, but the set or clear is done at BOTTOM. See
PWM Mode” on page 88
COM1A1
R/W
7
0
COM1A0/
COM1A0/
COM1B0
COM1B0
0
1
0
1
0
1
0
1
COM1A0
R/W
6
0
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 15: Toggle OC1A on Compare Match, OC1B
disconnected (normal port operation). For all other WGM1
settings, normal port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at
BOTTOM, (non-inverting mode)
Set OC1A/OC1B on Compare Match, clear OC1A/OC1B at
BOTTOM, (inverting mode)
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match
Clear OC1A/OC1B on Compare Match (Set output to low level)
Set OC1A/OC1B on Compare Match (Set output to high level)
COM1B1
R/W
5
0
for more details
Table 36
COM1B0
R/W
4
0
(1)
shows the COM1x1:0 bit functionality when the
FOC1A
W
3
0
FOC1B
W
2
0
WGM11
R/W
1
0
WGM10
R/W
0
0
TCCR1A
2486Z–AVR–02/11
“Fast