ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 193

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.6.3
8331A–AVR–07/11
Port override for Waveform Generation
Figure 15-5. Single slope Pulse Width Modulation
The PER register defines the PWM resolution. The minimum resolution is 2-bit (PER=0x0003),
and the maximum resolution is 8-bit (PER=MAX).
The following equation is used to calculate the exact resolution for a single slope PWM
(R
The single slow PWM frequency (f
eral clock frequency (f
where N represents the prescaler divider used (1, 2, 4, 8, 64, 256, 1024, or event channel n).
To make the waveform generation available on the port pins the corresponding port pin direction
must be set as output. The Timer/Counter will override the port pin values when the CMP chan-
nel is enabled (CMPLENx/CMPHENx).
Figure 15-6 on page 193
Timer/Counter Low, CMP channels A to D will override port pins 0 to 3 output value (OUTxn) on
the corresponding port pin (Pxn). For Timer/Counter High, CMP channels E to H will override
port pin 4 to 7. Enabling inverted I/O on the port pin (INVENxn) inverts the corresponding WG
output.
Figure 15-6. Port override for Timer/Counter Low and High
f
R
PWM_SS
CNT
WG Output
PWM_SS
PWM_SS
Waveform
):
=
BOTTOM
=
------------------------------ -
N PER
log
---------------------------------- -
(
MAX
TOP
f
(
log
PER
PER
CMPx
2 ( )
+
1
+
)
PER
1
)
), and it is calculated by using the following equation:
shows the port override for fthe Timer/Counter Low and High. For
Period (T)
CMPLENx/HENx
PWM_SS
OUT
) depends on the period setting (PER) and the Periph-
CMPx=TOP
Atmel AVR XMEGA AU
CMPx=BOT
INVEN
"match"
OCx
193