ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 413

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.3.4
32.3.5
8331A–AVR–07/11
Serial Transmission and Reception
Serial Transmission
Three different characters are used, DATA, BREAK, and IDLE. The BREAK character is equal
to a 12-bit length of low level. The IDLE character is equal to a 12- bit length of high level. The
BREAK and IDLE characters can be extended beyond the 12-bit length.
Figure 32-5. Characters and timing for the PDI physical layer.
The PDI physical layer is either in transmit (TX) or receive (RX) mode. By default, it is in RX
mode, waiting for a start bit.
The programmer and the PDI operate synchronously on the PDI_CLK provided by the program-
mer. The dependency between the clock edges and data sampling or data change is fixed. As
illustrated in
always set up (changed) on the falling edge of PDI_CLK and sampled on the rising edge of
PDI_CLK.
Figure 32-6. Changing and sampling of data.
When a data transmission is initiated (by the PDI controller), the transmitter simply shifts out the
start bit, data bits, parity bit, and the two stop bits on the PDI_DATA line. The transmission
speed is dictated by the PDI_CLK signal. While in transmission mode, IDLE bits (high bits) are
automatically transmitted to fill possible gaps between successive DATA characters. If a colli-
sion is detected during transmission, the output driver is disabled, and the interface is put into
RX mode waiting for a BREAK character.
Figure 32-6 on page
PDI_DATA
PDI_CLK
START
0
1
2
413, output data (either from the programmer or the PDI) is
Sample
3
1 BREAK character
1 DATA character
1 IDLE character
BREAK
4
IDLE
5
Atmel AVR XMEGA AU
6
Sample
7
P
STOP
Sample
413