SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 1040

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

38.7.17
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• OFFx: Offset for channel x
0 = No Offset.
1 = center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2
where G is the gain applied (see description of ADC_CGR register).
• DIFFx: Differential inputs for channel x
0 = Single Ended Mode.
1 = Fully Differential Mode.
1040
1040
DIFF15
OFF15
DIFF7
OFF7
31
23
15
7
SAM3S8/SD8
SAM3S8/SD8
ADC Channel Offset Register
DIFF14
OFF14
DIFF6
OFF6
30
22
14
ADC_COR
0x4003804C
Read-write
6
DIFF13
OFF13
DIFF5
OFF5
29
21
13
5
DIFF12
OFF12
DIFF4
OFF4
28
20
12
4
“ADC Write Protect Mode Register” on page
DIFF11
OFF11
DIFF3
OFF3
27
19
11
3
DIFF10
OFF10
DIFF2
OFF2
26
18
10
2
DIFF9
DIFF1
OFF9
OFF1
25
17
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
1043.
DIFF8
DIFF0
OFF8
OFF0
24
16
8
0