SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 943

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

35.7.35
Name:
Address:
Access:
This register acts as a double buffer for the CEN, CTR, CPR and CUPR values. This prevents an unexpected comparison
x match.
• CENUPD: Comparison x Enable Update
0 = The comparison x is disabled and can not match.
1 = The comparison x is enabled and can match.
• CTRUPD: Comparison x Trigger Update
The comparison x is performed when the value of the comparison x period counter (CPRCNT) reaches the value defined
by CTR.
• CPRUPD: Comparison x Period Update
CPR defines the maximum value of the comparison x period counter (CPRCNT). The comparison x value is performed
periodically once every CPR+1 periods of the channel 0 counter.
• CUPRUPD: Comparison x Update Period Update
Defines the time between each update of the comparison x mode and the comparison x value. This time is equal to
CUPR+1 periods of the channel 0 counter.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
31
23
15
–
–
–
7
PWM Comparison x Mode Update Register
PWM_CMPMUPDx
0x4002013C [0], 0x4002014C [1], 0x4002015C [2], 0x4002016C [3], 0x4002017C [4], 0x4002018C [5],
0x4002019C [6], 0x400201AC [7]
Write-only
30
22
14
–
–
–
6
CTRUPD
29
21
13
–
–
–
5
28
20
12
–
–
–
4
27
19
11
–
3
–
26
18
10
–
2
–
CUPRUPD
CPRUPD
SAM3S8/SD8
SAM3S8/SD8
25
17
–
9
1
–
CENUPD
24
16
–
8
0
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