SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 417
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 417 of 1465
- Download datasheet (26Mb)
25.7.2
Name:
Address:
Access:
Reset:
• COUNT: SDRAMC Refresh Timer Count
This 12-bit field is loaded into a timer that generates the refresh pulse. Each time the refresh pulse is generated, a refresh
burst is initiated. The SDRAM device requires a refresh every 15.625 μs or 7.81 μs. With a 100 MHz frequency, the
Refresh Timer Counter Register must be set with the value 1562 (15.625 μs x 100 MHz) or 781 (7.81 μs x 100 MHz).
To refresh the SDRAM device, this 12-bit field must be written. If this condition is not satisfied, no refresh command is
issued and no refresh of the SDRAM device is carried out.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
–
–
7
SDRAMC Refresh Timer Register
SDRAMC_TR
0x400E0204
Read-write
0x00000000
30
22
14
–
–
–
6
29
21
13
–
–
–
5
28
20
12
–
–
–
4
COUNT
27
19
11
–
–
3
26
18
10
–
–
2
COUNT
25
17
–
–
9
1
SAM3X/A
SAM3X/A
24
16
–
–
8
0
417
417
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