SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 551

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

28.2.13
28.2.13.1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Clock Switching Details
Master Clock Switching Timings
Table 28-1
from one selected clock to another one. This is in the event that the prescaler is de-activated.
When the prescaler is activated, an additional time of 64 clock cycles of the newly selected clock
has to be added.
Table 28-1.
Notes:
Table 28-2.
To
Main Clock
SLCK
PLL Clock
To
PLLA Clock
UPLL Clock
1. PLL designates either the PLLA or the UPLL clock.
2. PLLCOUNT designates either PLLACOUNT or UPLLCOUNT.
and
From
Clock Switching Timings (Worst Case)
Clock Switching Timings between Two PLLs (Worst Case)
From
Table 28-2
PLLCOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLx Clock
Main Clock
give the worst case timings required for the Master Clock to switch
4.5 x SLCK
4 x SLCK +
PLLACOUNT x SLCK
2.5 x PLLA Clock +
3 x UPLL Clock +
1.5 x UPLL Clock
–
PLLA Clock
4 x SLCK +
4 x SLCK +
PLLCOUNT x SLCK
2.5 x PLL Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
–
2.5 x UPLL Clock +
3 x PLLA Clock +
1.5 x PLLA Clock
UPLL Clock
4 x SLCK +
4 x SLCK +
x SLCK
PLLCOUNT x SLCK
2.5 x PLL Clock +
3 x PLL Clock +
3 x PLL Clock +
1 x Main Clock
SAM3X/A
SAM3X/A
4 x SLCK +
4 x SLCK +
PLL Clock
5 x SLCK
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