SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 818
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 818 of 1465
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35.7.8.9
818
818
SAM3X/A
SAM3X/A
Identifier Parity
A protected identifier consists of two sub-fields; the identifier and the identifier parity. Bits 0 to 5
are assigned to the identifier and bits 6 and 7 are assigned to the parity.
The USART interface can generate/check these parity bits, but this feature can also be disabled.
The user can choose between two modes by the PARDIS bit of the LIN Mode register
(US_LINMR):
During header transmission, the parity bits are computed and sent with the 6 least significant
bits of the IDCHR field of the LIN Identifier register (US_LINIR). The bits 6 and 7 of this register
are discarded.
During header reception, the parity bits of the identifier are checked. If the parity bits are wrong,
an Identifier Parity error occurs (see
IDCHR field are updated with the received Identifier. The bits 6 and 7 are stuck to 0.
During header transmission, all the bits of the IDCHR field of the LIN Identifier register
(US_LINIR) are sent on the bus.
During header reception, all the bits of the IDCHR field are updated with the received Identifier.
• PARDIS = 0:
• PARDIS = 1:
Section
35.7.3.8). Only the 6 least significant bits of the
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
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