SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 708
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 708 of 1465
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This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
708
708
SAM3X/A
SAM3X/A
Delay Between Consecutive Transfers
=
32
------------------------------------ -
MCK
DLYBCT
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
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