STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 102

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STM32F205ZG

Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F205ZG

10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII

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Electrical characteristics
102/170
Table 49.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
t
su(STO)
achieve fast mode I
clock.
period of SCL signal.
undefined region of the falling edge of SCL.
t
t
t
su(STA)
h(SDA)
PCLK1
r(SDA)
h(STA)
r(SCL)
f(SDA)
f(SCL)
C
b
must be at least 2 MHz to achieve standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition
setup time
Stop condition setup time
Stop to Start condition time
(bus free)
Capacitive load for each bus
line
I
2
C characteristics
2
C frequencies, and a multiple of 10 MHz to reach the 400 kHz maximum I
Parameter
Doc ID 15818 Rev 8
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
-
-
-
2
C frequencies. It must be at least 4 MHz to
1000
Max
300
400
-
-
-
-
-
-
-
-
2
C
(1)
STM32F205xx, STM32F207xx
20 + 0.1C
Fast mode I
Min
100
0
1.3
0.6
0.6
0.6
0.6
1.3
(4)
-
-
b
2
C
900
Max
300
300
400
(1)(2)
2
-
-
-
-
-
-
-
C fast mode
(3)
Unit
μs
μs
pF
µs
ns
µs

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