STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 43
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STM32F205ZG
Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F205VE.pdf
(170 pages)
Specifications of STM32F205ZG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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STM32F205xx, STM32F207xx
Table 6.
17 G7 26 37 47 R2
18 F1 27 38 48
19 E1 28 39 49 K4
20 J8 29 40 50 N4
21 H6 30 41 51 P4
22 H5 31 42 52 P3
23 J7 32 43 53 R3
24 H4 33 44 54 N5
25 G3 34 45 55 P5
26 J6 35 46 56 R5
H7
Pins
STM32F20x pin and ball definitions (continued)
L4
-
Pin name
REGOFF
PC4
PC5
PB0
PA3
PA4
PA5
PA6
PA7
V
V
DD_4
SS_4
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
Doc ID 15818 Rev 8
I/O FT
I/O
I/O TT
I/O TT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
S
S
(after reset)
function
REGOFF
V
V
Main
PC4
PC5
PB0
PA3
PA4
PA5
PA6
PA7
SS_4
DD_4
(3)
DCMI_PIXCLK / TIM3_CH1
SPI1_MOSI/ TIM8_CH1N /
OTG_HS_SOF/ I2S3_WS/
/ TIM1_BKIN/ EVENTOUT
USART2_RX/TIM5_CH4 /
TIM3_CH3 / TIM8_CH2N/
TIM1_CH2N/ EVENTOUT
TIM8_BKIN/TIM13_CH1 /
TIM8_CHIN/ EVENTOUT
TIM9_CH2 / TIM2_CH4 /
SPI1_NSS / SPI3_NSS /
OTG_HS_ULPI_CK /
OTG_HS_ULPI_D0 /
Alternate functions
ETH_RMII_RX_D0 /
ETH_RMII_RX_D1 /
OTG_HS_ULPI_D1/
ETH_MII_RX_DV /
ETH_MII_RX_D1 /
ETH_MII_RX_D0/
ETH_MII_RXD2 /
TIM2_CH1_ETR/
DCMI_HSYNC /
RMII_CRS_DV /
ETH_MII_COL/
USART2_CK /
TIM1_CH1N /
SPI1_MISO /
EVENTOUT
EVENTOUT
TIM14_CH1
EVENTOUT
EVENTOUT
EVENTOUT
SPI1_SCK/
TIM3_CH2/
Pinouts and pin description
ADC123_IN3
ADC12_IN14
ADC12_IN15
/DAC1_OUT
/DAC2_OUT
ADC12_IN4
ADC12_IN5
ADC12_IN6
ADC12_IN7
ADC12_IN8
functions
Other
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