STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 59

• Manufacturer Part Number: STM32F205ZG
• Description: High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
• Manufacturer: STMicroelectronics

Specifications of STM32F205ZG

• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII

STM32F205xx, STM32F207xx
5
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
Electrical characteristics
Parameter conditions
Unless otherwise specified, all voltages are referenced to V
Minimum and maximum values
Unless otherwise specified the minimum and maximum values are guaranteed in the worst
conditions of ambient temperature, supply voltage and frequencies by tests in production on
100% of the devices with an ambient temperature at T
the selected temperature range).
Data based on characterization results, design simulation and/or technology characteristics
are indicated in the table footnotes and are not tested in production. Based on
characterization, the minimum and maximum values refer to sample tests and represent the
mean value plus or minus three times the standard deviation (mean±3Σ).
Typical values
Unless otherwise specified, typical data are based on T
1.8 V ≤ V
tested.
Typical ADC accuracy values are determined by characterization of a batch of samples from
a standard diffusion lot over the full temperature range, where 95% of the devices have an
error less than or equal to the value indicated (mean±2Σ)
Typical curves
Unless otherwise specified, all typical curves are given only as design guidelines and are
not tested.
Loading capacitor
The loading conditions used for pin parameter measurement are shown in
Pin input voltage
The input voltage measurement on a pin of the device is described in
Figure 16. Pin loading conditions
DD
≤ 3.6 V voltage range). They are given only as design guidelines and are not
Doc ID 15818 Rev 8
Figure 17. Pin input voltage
A
A
= 25 °C and T
.
= 25 °C, V
SS
.
Electrical characteristics
DD
A
Figure
= 3.3 V (for the
= T
Figure
A
max (given by
17.
16.
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