ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 100
ST72344S4
Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST72344S4.pdf
(247 pages)
Specifications of ST72344S4
Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
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When a match is found between the Output Compare register and the free running counter,
the output compare function:
●
●
●
Two 16-bit registers Output Compare Register 1 (OC1R) and Output Compare Register 2
(OC2R) contain the value to be compared to the counter register each timer clock cycle.
Table 46.
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OC
The timing resolution is one count of the free running counter: (
Procedure:
To use the output compare function, select the following in the CR2 register:
●
●
And select the following in the CR1 register:
●
●
When a match is found between OCRi register and CR register:
●
●
●
The OC
the following formula:
Where:
●
●
●
If the timer clock is an external clock, the formula is:
Assigns pins with a programmable value if the OCIE bit is set
Sets a flag in the status register
Generates an interrupt if enabled
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCFi bit is set.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR2 register and the I bit is
cleared in the CC register (CC).
Δ
f
PRESC
Clock control
CPU
t = Output compare period (in seconds)
i
R register value required for a specific timing application can be calculated using
OCiR
= CPU clock frequency (in Hertz)
Δ
= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits, see
OCiR =
OCiR register
bits)
Δt
*
f
EXT
i
R value to 8000h.
Doc ID 12321 Rev 5
Δ
MS Byte
OCiR =
OCiHR
Table
Δt
PRESC
50).
*
f
CPU
f
CPU/
ST72344xx ST72345xx
CC[1:0]
LS Byte
OCiLR
).
Table 50:
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