ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 178
ST72344S4
Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST72344S4.pdf
(247 pages)
Specifications of ST72344S4
Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
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On-chip peripherals
11.7.8
Note:
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Register description
I
Reset value: 0000 0000 (00h)
Bits 7:6 = PL1:0 Page length configuration
Table 70.
Bit 5 = Reserved, must be kept at 0.
Bit 4 = ITER BERR / NACK Interrupt enable
In case of error, if ITER is enabled either interrupt 1 or 2 is generated depending on which
slave flags the error (see
Bit 3= ITRE3 Interrupt enable on read from Slave 3
Bit 2 = ITRE1/2 Interrupt enable on read from Slave 1 or 2
7
2
C 3S control register 1 (I2C3SCR1)
PL1
0
0
1
1
PL1
This bit is set and cleared by software. It is also cleared by hardware when the interface
is disabled (PE=0).
This bit is set and cleared by software. It is also cleared by hardware when the interface
is disabled (PE=0).
0: BERR / NACK interrupt disabled
1: BERR / NACK interrupt enabled
This bit is set and cleared by software It is also cleared by hardware when interface is
disabled (PE =0).
0: Interrupt on Read from Slave 3 disabled
1: Interrupt on Read from Slave 3 enabled
This bit is set and cleared by software It is also cleared by hardware when interface is
disabled
(PE =0)
0: Interrupt on Read from Slave 1 or 2 disabled
1: Interrupt on Read from Slave 1 or 2 enabled
PL0
0
1
0
1
PL configuration
PL0
Figure
Full Page (256 bytes for slave 1 & 2, 128 bytes for slave 3)
0
Doc ID 12321 Rev 5
83).
ITER
Read / Write
Page length
ITRE3
NA
16
8
ITRE1/2
ST72344xx ST72345xx
ITWE3
0
ITWE
1/2
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