ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 98

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ST72344S4

Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72344S4

Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
On-chip peripherals
Note:
98/247
1
2
3
4
5
Input capture
In this section, the index, i, may be 1 or 2 because there are 2 input capture functions in the
16-bit timer.
The two input-capture 16-bit registers (IC1R and IC2R) are used to latch the value of the
free-running counter after a transition detected by the ICAPi pin.
Table 45.
ICiR register is a read-only register.
The active transition is software-programmable through the IEDGi bit of Control Registers
(CRi).
The timing resolution is one count of the free-running counter: (
Procedure:
To use the input capture function, select the following in the CR2 register:
And select the following in the CR1 register:
When an input capture occurs:
Clearing the Input Capture interrupt request (i.e. clearing the ICFi bit) is done in two steps:
1.
2.
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi will never
be set until the ICiLR register is also read.
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
The 2 input capture functions can be used together even if the timer also uses the 2 output
compare functions.
In One-pulse Mode and PWM mode only the input capture 2 can be used.
The alternate inputs (ICAP1 & ICAP2) are always directly connected to the timer. So any
transitions on these pins activate the input capture function.
Select the timer clock (CC[1:0]) (see
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input).
Set the ICIE bit to generate an interrupt after an input capture coming from either the
ICAP1 pin or the ICAP2 pin
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input).
ICFi bit is set.
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
Reading the SR register while the ICFi bit is set.
An access (read or write) to the ICiLR register.
ICiR
ICiR register
Figure
Doc ID 12321 Rev 5
48).
MS Byte
ICiHR
Table 50: Clock control bits on page
f
CPU
/
ST72344xx ST72345xx
CC[1:0]).
LS Byte
ICiLR
110).

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