TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 198
TMPM382FSFG
Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM382FSFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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9 16-bit Timer/Event Counters (TMRBs)
Enable reverse when data is
taken into TB0CP0
C ount clock
(Prescaler output clock)
TB0IN input
(External trigger pulse)
Match with TB0RG1
Timer output TB0OUT pin
If a delay is not required, TB0FF0 is reversed when data is taken into TB0CP0, and TB0RG1 is set to
the sum of the TB0CPO value (c) and the one-shot pulse width (p), (c + p), by generating the
INTTB00 interrupt. TB0RG1 change must be completed before the next match. TB0FF0 is enabled to
reverse when UC0 matches with TB0RG1, and is disabled by generating the INTTB01 interrupt.
Fig 9-7 One-shot Pulse Output Triggered by an External Pulse (Without Delay)
c
Enable reverse
Taking data into the capture register
TB0CP0. INTCAP00 generation
Pulse width
(p)
TMPM380/M382 - 32 / 34 -
c + p
INTTB01 generation
Disable revers e when data is taken into
TB0CP1
Taking data into the captur e
register TB0CP1
TMPM380/M382
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