TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 388

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

13.5 Operation in Each Mode
13.5.1 Mode 0 (I/O interface mode)
Mode 0 consists of two modes, the “SCLK output” mode to output synchronous clock and
the “SCLK input” mode to accept synchronous clock from an external source. The following
operational descriptions are for the case use of FIFO is disabled. For details of FIFO
operation, refer to the previous sections describing receive/transmit FIFO functions.
Transmitting data
SCLK output mode
In the SCLK output mode, if SC0MOD2<WBUF> is set to “0” and the transmit double
buffers are disabled, 8 bits of data are output from the TXD0 pin and the synchronous
clock is output from the SCLK0 pin each time the CPU writes data to the transmit buffer.
When all data is output, the INTTX0 interrupt is generated.
If SC0MOD2 <WBUF> is set to “1” and the transmit double buffers are enabled, data is
moved from Transmit Buffer to Transmit shift register when the CPU writes data to
Transmit Buffer while data transmission is halted or when data transmission from
Transmit shift register (shift register) is completed. When data is moved from Transmit
Buffer to Transmit shift register, the transmit buffer empty flag SC0MOD2 <TBEMP> is
set to “1,” and the INTTX0 interrupt is generated. If Transmit Buffer has no data to be
moved to Transmit shift register , the INTTX0 interrupt is not generated and the SCLK0
output stops.
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TMPM380/M382