TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 248

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10 16-bit Multi-purpose Timers (MPTs)
10.6.11 Trigger Start Interrupt (INTMTTB01)
10.6.12 Period Setup Interrupt (INTMTTB00)
MTnIGCR<IGIDIS> specifies
whether the first INTMTTB00
occurs.
a trigger start Interrupt occurs when the counter starts upon the detection of a trigger edge
specified with MTnIGCR<IGTRGSEL>. In the trigger capture mode, trigger edge detection does
not cause an interrupt. A start trigger causes an interrupt even when the counter is stopped in
emergency.
mode is selected, a period interrupt (INTMTTB00) occurs when the counter starts with a
command start and when the counter is cleared with the specified counter period (MTnIGREG4)
reached at the end of specified period. A match with the set period causes an interrupt even
when the counter is stopped in emergency. The interrupt periods are selected as every 1-period,
2-period and 4-period specified with MTnIGCR<IGPRD[1:0]>.
interrupt control register MT0IGCR<IGIDIS>. When a command starts specified with
MT0RN<MTRUN> setting to 1” and MT0IN pin is stop level, the counter does not start
(INTMTTB00 is not generated). A subsequent trigger start edge causes the counter to start and
INTMTTB01 occurs.
In the case that the command start and trigger start mode, or the trigger start mode is selected,
In the case that command start and trigger capture mode, or command start and trigger start
An interrupt generation at the start counting is prohibited or permitted with command start
Figure 10-7 Period Setup Interrupt Operation
Figure 10-6 Trigger Start Interrupt Operation
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TMPM380/M382