TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 592

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

6) Determination of a Serial Operation Mode
The first byte from the controller determines the serial operation mode. To use UART mode for
communications between the controller and the target board, the controller must first send a value of
0x86 at a desired baud rate to the target board. To use I/O Interface mode, the controller must send a
value of 0x30 at 1/16 the desired baud rate. Fig 23-6 shows the waveforms for the first byte.
SIO reception disabled, and calculates the intervals of tAB, tAC and tAD. Table 23-5 shows a flowchart
describing the steps to determine the intervals of tAB, tAC and tAD. As shown in the flowchart, the boot
program captures timer counts each time a logic transition occurs in the first serial byte. Consequently,
the calculated tAB, tAC and tAD intervals are bound to have slight errors. If the transfer goes at a high
baud rate, the CPU might not be able to keep up with the speed of logic transitions at the serial receive
pin. In particular, I/O Interface mode is more prone to this problem since its baud rate is generally much
higher than that for UART mode. To avoid such a situation, the controller should send the first serial
byte at 1/16 the desired baud rate.
The flowchart in Table 23-5 shows how the boot program distinguishes between UART and I/O
Interface modes. If the length of tAB is equal to or less than the length of tCD, the serial operation
mode is determined as UART mode. If the length of tAB is greater than the length of tCD, the serial
operation mode is determined as I/O Interface mode. Bear in mind that if the baud rate is too high or
the timer operating frequency is too low, the timer resolution will be coarse, relative to the intervals
between logic transitions. This becomes a problem due to inherent errors caused by the way in which
timer counts are captured by software; consequently the boot program might not be able to determine
the serial operation mode correctly. To prevent this problem, reset UART mode within the
programming routine.
For example, the serial operation mode may be determined to be I/O Interface mode when the
intended mode is UART mode. To avoid such a situation, when UART mode is utilized, the controller
should allow for a time-out period within which it expects to receive an echo-back (0x86) from the
target board. The controller should give up the communication if it fails to get that echo-back within the
allowed time. When I/O Interface mode is utilized, once the first serial byte has been transmitted, the
controller should send the SCLK clock after a certain idle time to get an acknowledge response. If the
received acknowledge response is not 0x30, the controller should give up further communications.
After
UART (0x86)
I/O Interface
RESET
(0x30)
is released, the boot program monitors the first serial byte from the controller, with the
A
A
Start
bit 0
Fig 23-6 Serial Operation Mode Byte
tAD
tAB
tAC
TMPM380/M382 - 31 / 54 -
bit 0
bit 1
tAB
tAD
tAC
B
bit 1
bit 2
bit 2
bit 3
C
B
bit 3
bit 4
bit 4
bit 5
tCD
C
bit 5
bit 6
tCD
bit 6
bit 7
D
D
bit 7
TMPM380/M382
Stop