TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 586

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

3.
4.
5.
6.
7.
The 3rd byte transmitted from the controller to the target board is a command. The
code for the RAM Transfer command is 0x10.
The 4th byte, transmitted from the target board to the controller, is an acknowledge
response to the 3rd byte. Before sending back the acknowledge response, the boot
program checks for a receive error. If there was a receive error, the boot program
transmits x8H (bit 3) and returns to the state in which it waits for a command (the third
byte) again. In this case, the upper four bits of the acknowledge response are
undefined - they hold the same values as the upper four bits of the previously issued
command. When the SIO0 is configured for I/O Interface mode, the boot program does
not check for a receive error.
If the 3rd byte is equal to any of the command codes listed in Table 23-4, the boot
program echoes it back to the controller. When the RAM Transfer command was
received, the boot program echoes back a value of 0x10 and then branches to the
RAM Transfer routine. Once this branch is taken, password verification is done.
Password verification is detailed in a later section “Password”. If the 3rd byte is not a
valid command, the boot program sends back 0xN1 (bit 0) to the controller and returns
to the state in which it waits for a command (the third byte) again. In this case, the
upper four bits of the acknowledge response are undefined - they hold the same
values as the upper four bits of the previously issued command.
The 5th to 16th bytes transmitted from the controller to the target board, are a 12-byte
password. Each byte is compared to the contents of following addresses in the flash
memory. The verification is started with the 5
designated area. If the password verification fails, the RAM Transfer routine sets the
password error flag.
The 17th byte is a checksum value for the password sequence (5th to 16th bytes). To
calculate the checksum value for the 12-byte password, add the 12 bytes together,
drop the carries and take the two’s complement of the total sum. Transmit this
checksum value from the controller to the target board. The checksum calculation is
described in details in a later section “Checksum Calculation”.
The 18th byte, transmitted from the target board to the controller, is an acknowledge
TMPM380/382FW
Product name
the SC0BUF. Then, the SIO0 waits for the SCLK0 signal to come from the
controller. Following the transmission of the 1st byte, the controller should send
the SCLK clock to the target board after a certain idle time (several microseconds).
This must be done at 1/16 the desire baud rate. If the 2nd byte, which is from the
target board to the controller, is 0x30, then the controller should take it as a
go-ahead. The controller must then deliver the 3rd byte to the target board at a
rate equal to the desired baud rate. The boot program sets the RXE bit in the
SC0MOD register to enable reception before loading the SIO transmit buffer with
0x30.
TMPM380FY
TMPM382FS
TMPM380/M382 - 25 / 54 -
0x3F83_FFF4 – 0x3F83_FFFF
Area
th
byte and the smallest address in the
TMPM380/M382